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Vaaman SBC RK3399 CPU 4GB LPDDR4 RAM, T120 FPGA 1GB DDR3 RAM, WiFi Bluetooth Ethernet
The Vaaman is a single-board computer with on-board FPGA support. It is powered by the Rockchip RK3399 SoC, which features a dual-core Cortex-A72 processor and a quad-core Cortex-A53 processor. The board also features a 4GB LPDDR4 RAM and a 40-pin GPIO header. The board is pre-installed with Debian 11 (Bullseye) on its eMMC storage.
Vaaman is a high-performance edge computing board, featuring a six-core ARM CPU and an FPGA with 112,128 logic cells. Its unique design makes it ideal for addressing many challenges unmet by current products. With a 300-MBps link between FPGA and CPU, Vaaman is optimized for hardware acceleration and excels at parallel computing. Vaaman’s versatility extends to its comprehensive range of interfaces, including PCI, HDMI, USB, MIPI, audio, Ethernet, Wi-Fi, Bluetooth, BLE, LVDS, and GPIOs.
User Manual / Datasheet / Example Codes Etc.
Specifications
- SOC : Rockchip RK3399 (Dual Cortex-A72 + Quad Cortex-A53)
- Mali-T864 GPU, OpenGL ES1.1/2.0/3.0/3.1, OpenCL, DX11
- 4 GB LPDDR4 RAM
- PCIe : PCIe 2.1 (4 full-duplex lanes at 20 Gbps)
- Real-Time Clock : RTC support via built-in battery interface
- Power : 18-W USB Type-C PD
Ports
- 2x USB 2.0 Type-A
- 1x USB 3.0 Type-A
- 1x HDMI 2.0 (Micro), Supports maximum 4K @ 60 Hz display
- 1x MIPI-DSI, Supports 2560x1600 @ 60 fps output with dual channel
- 1x USB Type-C DP, Supports maximum 4K @ 60 Hz display
- 1x MIPI-CSI, 2 lanes via FPC connector, support up to 800 MB/s bandwidth
- 3.5 mm jack with mic
- Gigabit ethernet (Realtek RTL8211E)
- MicroSD
Wireless : Integrated RTL8822CS Wi-Fi and Bluetooth Combo Module (6222B-SRC)
- Wi-Fi 2.4G+5G
- Wi-Fi 2T2R
- Bluetooth 5.0
I/O
- 40-pin GPIO header: supports one 12-pin PMOD and two LVDS lanes or 25 GPIOs
- 1x UART
- 2x SPI bus
- 2x I²C bus
- 1x PCM/I²S
- 1x SPDIF
- 1x PWM
- 1x ADC
- 6x GPIO
- 2x 5-V DC
- 2x 3.3-V power pin
FPGA : Efinix Trion T120
- Logic Elements: 112,128
- Embedded Memory: 5,407 Kb
- Embedded Memory Blocks (5 Kb each): 1,056
- Embedded Multipliers: 320 (18x18 bit)
- 1 GB of DDR3L dedicated RAM, x32 PHY with memory controller hard IP, 25.6 Gbps aggregate bandwidth
- Supports 1.8, 2.5, and 3.3-V single-ended I/O standards and interfaces
- Up to 16 PLL-generated global clock signals
FPGA Interface Blocks
- GPIO
- PLL
- LVDS 800 Mbps per lane with up to 20 TX pairs and 20 RX pairs
- MIPI DPHY with CSI-2 controller hard IP, 1.5 Gbps per lane
- Direct CSI-2 connectors
